EC GATE 2008 - Online Test
Q1. The two numbers represented in signed 2’s complement form are P + 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2’s complement is
Answer : Option B
Explaination / Solution:
Q2. Which of the following Boolean Expressions correctly represents the relation
between P,Q,R and M1
Answer : Option D
Explaination / Solution:
Q3. For the circuit shown in the following, I0 - I3 are inputs to the 4:1 multiplexers,
R(MSB) and S are control bits. 
The output Z can be represented by
Answer : Option A
Explaination / Solution:
Q4. 
For each of the positive edge-triggered J - K flip flop used in the following figure, the propagation delay is Δt .
Which of the following wave forms correctly represents the output at Q1?
Answer : Option B
Explaination / Solution:
Since the input to both JK flip-flop is 11, the output will change every time with clock pulse. The input to clock is
The output Q0 of first FF occurs after time ΔT and it is as shown below
The output Q1 of second FF occurs after time ΔT when it gets input (i.e. after ΔT from t1) and it is as shown below
Q5. 
For the circuit shown in the figure, D has a transition from 0 to 1 after CLK changes from 1 to 0. Assume gate delays to be negligible. Which of the following statements is true
Answer : Option A
Explaination / Solution:
No Explaination.
Q6. 
In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relation
Volts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.
Volts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.The stable reading of the LED displays is
Answer : Option D
Explaination / Solution:
and when VADC = 6.5 V (at 1101), the output of AND is zero and the counter stops. The stable output of LED display is 13.
Q7.
In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relationVolts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.
Volts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.The magnitude of the error between VDAC and Vin at steady state in volts is
Answer : Option B
Explaination / Solution:
No Explaination.
Q8. The input and output of a continuous time system are respectively denoted by x(t) and y(t). Which of the following descriptions corresponds to a causal system ?
Answer : Option C
Explaination / Solution:
The output of causal system depends only on present and past states only.
In option (A) y(0) depends on x(- 2) and x(4).
In option (B) y(0) depends on x(1).
In option (C) y(0) depends on x(- 1).
In option (D) y(0) depends on x(5).
Thus only in option (C) the value of y(t) at t = 0 depends on x(- 1) past value.
In all other option present value depends on future value.
Q9. The impulse response h(t) of a linear time invariant continuous time system is
described by 
where u(-t) denotes the unit
step function, and α and β are real constants. This system is stable if
where u(-t) denotes the unit
step function, and α and β are real constants. This system is stable if
Answer : Option D
Explaination / Solution:
This system is stable only when bounded input has bounded output For stability αt < 0 for t > 0 that implies α < 0 and βt > 0 for t > 0 that implies β > 0. Thus, α is negative and β is positive.
Q10. The pole-zero given below correspond to a
Answer : Option C
Explaination / Solution:
